The present invention relates to a method of inputting addresses in a nonvolatile memory device and, more particularly, to a method of inputting addresses in a nonvolatile memory device including one or more planes and a method of operating a nonvolatile memory device using the same.
A semiconductor memory device is a memory device that is able to store data and read stored data, if appropriate. Semiconductor memory devices include volatile memory, which loses stored data when power is off, and nonvolatile memory, which can retain stored data although power is off. Flash memory among the nonvolatile memory devices has the function of electrically erasing data of cells in a lump, and has been widely used in computers, memory cards, and so on.
Flash memory is divided into a NOR type and a NAND type according to bit lines of a cell and connection status thereof. NOR type flash memory has a structure in which two or more cell transistors are connected in parallel to one bit line, and is configured to store data using the channel hot electron method and erase data using the Fowler-Nordheim (F-N) tunneling method. NAND type flash memory has a structure in which two or more cell transistors are connected in series to one bit line, and is configured to store and erase data using the F-N tunneling method. In general, NOR type flash memory is disadvantageous in the high integration because of great current consumption, but is advantageous in that it can easily cope with a high speed. NAND type flash memory is advantageous in the high integration because it uses a low cell current when compared with NOR type flash memory.
A nonvolatile memory device, such as the above-described flash memory device, receives a program command, address information of a memory cell in which data will be stored, and data to be programmed in order to perform a program operation, and performs the program operation. In order to read data stored in a nonvolatile memory device, a data read command and an address of a memory cell from which data will be read are received, and a data read operation is performed.
At this time, the address information input to the nonvolatile memory device largely consists of a column address ‘C_Add’ and a row address ‘R_Add’. When a nonvolatile memory device includes one or more planes, the address information further includes a plane address. In general, the plane address is input when the row address ‘R_Add’ is input.
Meanwhile, a nonvolatile memory device having one or more planes typically operates on a page basis. A method of operating a page of two or more planes at the same time was developed. Thus, a nonvolatile memory device having two planes can operate on a page basis as if it has a twice page size.
Meanwhile, even when the size of a page itself increases, a nonvolatile memory device is sometimes implemented to input and output data at half size of a unit page for the purpose of compatibility with a system using a nonvolatile memory device having a page of a previous size.
In order to implement data input/output with respect to two or more planes or an operation of storing and outputting data with respect to one page by dividing it twice or more as described above, an input/output operation of data should be performed twice or more using a new command.
FIG. 1 shows an address configuration of a general nonvolatile memory device.
Referring to FIG. 1, an address input for program or data read of a nonvolatile memory device comprises five address cycles. Two column address cycles are first input, and three row address cycles are then input.
Here, the address cycles are input sequentially through an Address Latch Enable (ALE) pin of the nonvolatile memory device and IO pins [7:0]. At this time, when a row address is input, the address of a plane is input. As shown in FIG. 1, the address of a plane is input through IO pin [7] at a third address cycle. Further, data input and output of a nonvolatile memory device are consecutively performed as many as a predetermined number from an input column address according to the input address information. There is a random data input/output operation for partially executing data input/output discontinuously by changing column addresses.
In order to perform the random data input/output operation, when an address is input, only column address input is performed, but row address input is omitted.
In the case in which a nonvolatile memory device has two planes, command input for data read and program operations is as follows.
In order to read data, a data read command ‘00h’, address information about a first plane, and an execution command ‘30h’ are first input. Next, a data read command ‘00h’, address information about a second plane, and an execution command ‘30h’ are input.
After the data read commands of the first plane and the second plane are input, a nonvolatile memory device reads data by performing a sensing operation internally and outputs the read data to the outside.
At this time, in order to output data, if the command ‘00h’, address information about a desired plane, and a random data output command are input, data read by the random data output operation is output. The random data output operation is performed to output data discontinuously while changing column addresses, so only the column addresses are input in order to perform the operation.
When performing an operation for programming data, a program command ‘80h’, address information about the first plane, data to be programmed, and an execution command ‘11h’ are first input. Next, a program command ‘81h’, address information about the second plane, data to be programmed, and an execution command ‘10h’ are input. That is, when data is input to each plane, all the five cycles of the address information must be input.
Further, when performing an erase operation, only the three cycles of the row address are input when the addresses of the first and second planes are input.
As described above, in order to input each plane address when a nonvolatile memory device including two or more planes performs program, read and erase operations, all the five cycles of the address information must be input or the three cycles of the row addresses must be input. Accordingly, the address input process is complicated and unnecessary addresses can be input.
In particular, in the case in which the random data input/output method is employed, there is no problem in performing an operation although only the column addresses are input as mentioned earlier. However, in order to input the address of a plane, row addresses must be input unnecessarily. In order to obviate such inconvenience, a new command is required or a user must input an address so as to repeatedly perform an existing command. However, this process is very complicated.